Analog Devices Inc. ADP5003 Low-Noise μPMU Buck Regulator
Analog Devices Inc. ADP5003 Low-Noise μPMU Buck Regulator combines a high-voltage buck regulator and an ultra-low noise low dropout (LDO) regulator in a small LFCSP package to deliver quiet and highly efficient regulated power supplies. ADP5003's buck regulator and LDO can operate with high-output currents up to 3A. The LDO operates efficiently with low headroom voltage while maintaining high-power supply rejection. The integrated buck regulator and ultra-low noise LDO design enable the ADP5003 to improve system efficiency and thermal performance as the device powers high-speed data converter and RF transceiver applications.Features
- Low-noise, DC power supply system
- High-efficiency buck for first-stage conversion
- High PSRR, low-noise LDO regulator to remove switching ripple
- Adaptive LDO regulator headroom control option for optimal efficiency and PSRR across the full load range
- 3A, low-noise, buck regulator
- 4.2V to 15V wide input voltage range
- 0.6V to 5.0V programmable output voltage range
- 0.3MHz to 2.5MHz internal oscillator
- 0.3MHz to 2.5MHz SYNC frequency range
- 3A, low-noise, NFET LDO regulator (active filter)
- 0.65V to 5V wide input voltage range
- 0.6V to 3.3V programmable output voltage range
- Differential point-of-load remote sensing
- 3μVrms output noise (independent of output voltage)
- PSRR >50dB (to 100kHz) with 400mV headroom at 3A
- Ultra-fast transient response
- Power-good output
- Precision enable inputs for both the buck regulator and LDO
- Efficiency
- ~90% (12V≥3.4V≥3.3V/1A)
- ~82% (12V≥1.4V≥1.3V/1A)
- Output accuracy: ±1.5%, Remote-sense
- -40°C to +125°C operating junction temperature range
- 32-lead, 5mm × 5mm, LFCSP
Applications
- Low-noise power for high-speed analog-to-digital converter (ADC) and digital-to-analog converter (DAC) designs
- Powering RF agile transceivers and clocking ICs
Block Diagram
Videos
Publicado: 2018-04-13
| Actualizado: 2023-01-24